EMC · CISPR 25 · Full physics engine

Calibrated CISPR 25 conducted-emission model for a motor inverter

Tools

Python · ngspice · KiCad · Bayesian calibration

Domain

Power electronics · automotive EMC

Result

2.0 dB RMS against the lab scan

2.0 dB RMS error against the lab conducted-emission scan. Before any measurement, physics and datasheets alone were already within ~11 dB.
Physics
  • SourcesCentre-aligned SVPWM switch-node edges, giving exact line spectra up to 110 MHz
  • CircuitNodal solution at every frequency: LISNs, harness over the ground plane, filter, DC link and motor
  • ParasiticsStray capacitance and loop coupling extracted from the KiCad copper
  • ReceiverCISPR 25 test receiver with 9 / 120 kHz RBW and average and peak detectors
  • ThermalFour-layer finite-volume board model built from the copper and vias
Role of ML
The explorer runs the physics engine directly. Exact numerical shortcuts bring a full spectrum down to about 0.1 s, fast enough for interactive use, so every result shown is a complete solve.

Background

A three-phase motor-inverter board was measured for conducted emissions to EN 55025 / CISPR 25 (voltage method), with one average-detector scan taken before the input filter was fitted. The practical question was which PCB changes buy which emission class, and what each costs in switching loss and temperature, without building a board for every idea.

Approach

The model is built from physics, from the noise source through to the test receiver:

A fast evaluator stays within 0.03 dB of the reference model and returns a full spectrum in about 0.1 s. That is what makes the explorer interactive: click a part on the 3D board, change its value or remove it, and the spectrum and emission class update immediately.

CISPR 25 Explorer: 3D inverter PCB with highlighted parts, live conducted-emission spectrum against class limits and the lab trace, class score card and part editor
CISPR 25 Explorer: Y-capacitor to the housing populated, the model (white) drops below the Class 3 limits and the score card reads PASS Class 3, with the lab trace (orange) for reference.

Physics first, then calibration

Before touching the lab data, the model was run on what the drawings and datasheets give: part values, MOSFET switching data, PCB copper and textbook estimates for the test-setup parasitics. With no measurement at all, it already reproduced the shape of the spectrum, including the 12 kHz switching comb, the common-mode plateau and the receiver step at 30 MHz, at about 11 dB RMS.

Model prediction before any measurement against the lab trace, with Class 1 and Class 3 average limits
Before calibration: the physics model from datasheets, PCB geometry and textbook estimates only (black) against the lab trace measured later (grey).

The remaining gap pointed at something real. Geometry gives about 8 pF from board to motor housing, but the measurement needs about 0.5 nF: a coupling path that isn't on this board, most likely a capacitor on the logic board's chassis connection. Calibration then fitted only the setup parasitics no drawing provides (housing couplings, supply entry, effective edge time, off-board DC link), bringing the model to 2.0 dB RMS.

Two fitted values matched measurements that were not used in the fit: a housing-to-plane capacitance of 21 pF against 20 pF measured, and a 31 ns hard edge inside the 25–40 ns seen on the scope. A Bayesian calibration then gives a spread for every parameter, so each design gets a class probability rather than a single verdict. For the tested board it gives Class 2 at 65% on the average detector, which is what the lab scan shows.

Calibrated model versus lab measurement, with the common-mode and differential-mode contributions split below
Calibrated model against the lab scan (top), and the same spectrum split into common-mode and differential-mode paths (bottom). Above about 2 MHz the noise is common mode, through the motor windings to the housing.

Design exploration

A built-in optimiser finds the smallest set of PCB changes that reaches a target class with 0.5 dB margin, trying value changes first and only then adding parts. It typically takes 15–20 s. Applied to the board design:

Thermal cross-check

The same app carries a four-layer finite-volume thermal model of the board, built from the KiCad copper and vias. This brought out an important trade-off. The optimiser's cheapest route to Class 2 was to raise the snubber capacitors from 330 pF to 3.3 nF, but the thermal model puts the snubber resistors at about 95 °C, twice their power rating. An EMI fix that looks free on the spectrum is rejected on temperature.

Steady-state thermal map of the inverter board with junction temperatures labelled on the MOSFETs, diode and resistors
Steady-state board temperature with junction temperatures of every heat source (4.86 W total dissipation).

Results

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